MJ Logic Design
Ethernet/AV Controller ASIC

This ASIC provided bidirectional bridging of isochronous audio and video
streams between the multiple gigabit Ethernet and programmable A/V
interfaces (2 GbE, 4 audio, 1 video).  Audio/video formats included 61883 for
GbE, IxS for serial audio, and MPEG2/BT656 for parallel video.  Presentation
time was supported to allow synchronization of related streams to be
maintained as streams were independently enabled/disabled.  We designed
several custom blocks and then assumed responsibility for feature
enhancement and debug of the entire Ethernet/AV section.  The custom-
designed blocks included:
  • Gigabit Ethernet Port Block:  This block included a DMA (see below),
    a third-party GbE MAC core, and custom transmit/receive logic to
    implement the following:  Tx/Rx DMA interface, 4 Tx queues with rate or
    launch-time based traffic shaping, 2 Rx queues, Rx L2
    (DIX/SNAP/SAP/RAW) and L3 (AVB) packet parsing/classification, and
    Rx header/payload data separation.
  • DMA Controller:  This multi-channel, descriptor-based DMA block was
    used in several different instances (Ethernet, A/V, and PCI blocks)
    throughout the Ethernet/AV Controller chip.  Key features included:  
    linked-list descriptor or register-based operation, per-channel
    peripheral interfaces for flow control, circular buffer addressing
    modes, programmable scatter/gather support, AHB/Wishbone master
    interfaces, and one APB slave configuration interface.
  • Audio/Video Port Block:  This block implements four programmable
    serial audio ports and one programmable parallel video port.  We
    modified this previously-coded block to restructure clock domain
    crossings and enhanced as necessary to support the required range
    of audio and video formats.